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SRAM Chip CY7C128A-45DMB
Cypress
CY7C128A-45DMB
--
Memory
SRAM Chip
Specification
| Product Attribute | Attribute Value |
| HTS | 8542.32.00.41 |
| PPAP | No |
| EU RoHS | Not Compliant |
| ECCN (US) | 3A001a.2.c. |
| Automotive | No |
| Part Status | Obsolete |
| Timing Type | Asynchronous |
| Number of Ports | 1 |
| Number of Words | 2K |
| Chip Density (bit) | 16K |
| Process Technology | CMOS |
| Max. Access Time (ns) | 45 |
| Data Rate Architecture | SDR |
| Operating Current (mA) | 100 |
| Address Bus Width (bit) | 11 |
| Number of Bits/Word (bit) | 8 |
| Supplier Temperature Grade | Military |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -55 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Description |
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