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74ABT373APW,112
74ABT373APW,112
Latches 74ABT373APW,112
NXP
74ABT373APW,112
--
Standard and Specialty Logic
Latches
Specification
Product AttributeAttribute Value
PPAPNo
TypeD-Type
EU RoHSSupplier Unconfirmed
Bus HoldNo
MountingSurface Mount
PolarityNon-Inverting
ECCN (US)EAR99
PackagingBulk
Pin Count20
Set/ResetNo
AutomotiveNo
Latch ModeTransparent
Output Type3-State
PCB changed20
Part StatusObsolete
Logic FamilyABT
Package Width4.5(Max)
Package Height0.95(Max)
Package Length6.6(Max)
Supplier PackageTSSOP
Process TechnologyBiCMOS
Number of Inputs per Chip8
Number of Outputs per Chip8
Number of Channels per Chip8
Number of Elements per Chip1
Maximum Quiescent Current (uA)30000
Typical Quiescent Current (uA)24000
Maximum Operating Temperature (°C)85
Minimum Operating Temperature (°C)-40
Number of Input Enables per Element1
Absolute Propagation Delay Time (ns)5.7
Maximum Operating Supply Voltage (V)5.5
Minimum Operating Supply Voltage (V)4.5
Number of Output Enables per Element1
Typical Operating Supply Voltage (V)5
Maximum Low Level Output Current (mA)64
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-32
Number of Selection Inputs per Element0
Maximum Propagation Delay Time @ Maximum CL (ns)4.7@5V
Description
Latch Transparent 3-ST 8-CH D-Type 20-Pin TSSOP Bulk
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