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74LV374PW,112
74LV374PW,112
Flip Flops 74LV374PW,112
NXP
74LV374PW,112
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Standard and Specialty Logic
Flip Flops
Specification
Product AttributeAttribute Value
PPAPUnknown
EU RoHSSupplier Unconfirmed
Bus HoldNo
MountingSurface Mount
PolarityNon-Inverting
ECCN (US)EAR99
PackagingBulk
Pin Count20
AutomotiveUnknown
Output Type3-State
PCB changed20
Part StatusObsolete
Logic FamilyLV
Package Width4.5(Max)
Logic FunctionD-Type Bus Interface
Package Height0.95(Max)
Package Length6.6(Max)
Triggering TypePositive-Edge
Supplier PackageTSSOP
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Number of Element Inputs8
Number of Element Outputs8
Number of Channels per Chip8
Number of Elements per Chip1
Maximum Quiescent Current (mA)0.16
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)49
Maximum Operating Supply Voltage (V)5.5
Minimum Operating Supply Voltage (V)1
Number of Output Enables per Element1
Typical Operating Supply Voltage (V)3.3
Maximum Low Level Output Current (mA)16
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-16
Maximum Propagation Delay Time @ Maximum CL (ns)17(Typ)@3.3V|23(Typ)@2.7V|31(Typ)@2V|90(Typ)@1.2V
Description
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element Automotive 20-Pin TSSOP Bulk
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