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DRAM Chip K4M563233G-HN75000
Samsung Electronics
K4M563233G-HN75000
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Memory
DRAM Chip
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| DRAM Type | Mobile SDRAM |
| ECCN (US) | EAR99 |
| Pin Count | 90 |
| Automotive | No |
| PCB changed | 90 |
| Part Status | Obsolete |
| Organization | 8Mx32 |
| Package Width | 8 |
| Interface Type | LVCMOS |
| Package Height | 1(Max) - 0.25(Min) |
| Package Length | 13 |
| Supplier Package | FBGA |
| Chip Density (bit) | 256M |
| Data Bus Width (bit) | 32 |
| Operating Current (mA) | 130 |
| Address Bus Width (bit) | 14 |
| Maximum Access Time (ns) | 7|5.4 |
| Maximum Clock Rate (MHz) | 133 |
| Number of Internal Banks | 4 |
| Number of Words per Bank | 2M |
| Number of Bits/Word (bit) | 32 |
| Number of I/O Lines (bit) | 32 |
| Supplier Temperature Grade | Extended |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -25 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 2.7 |
| Typical Operating Supply Voltage (V) | 3 |
| Description |
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