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Clock Buffers and Drivers CDCL1810RGZRG4
Texas Instruments
CDCL1810RGZRG4
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Clock and Timing
Clock Buffers and Drivers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| Type | Divider Buffer |
| Fanout | 1:10 |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 48 |
| Automotive | No |
| Lead Shape | No Lead |
| PCB changed | 48 |
| Part Status | Active |
| Package Width | 7.15(Max) |
| Package Height | 0.95(Max) |
| Package Length | 7.15(Max) |
| Supplier Package | VQFN EP |
| Input Logic Level | LVDS |
| Output Logic Level | CML |
| Standard Package Name | QFN |
| Number of Outputs per Chip | 10 |
| Supplier Temperature Grade | Industrial |
| Maximum Input Frequency (MHz) | 650 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Supply Voltage (V) | 1.9 |
| Minimum Operating Supply Voltage (V) | 1.7 |
| Typical Operating Supply Voltage (V) | 1.8 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 3(Typ)@1.8V |
| Description |
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