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Bus Transceivers 74LVCH16245ADGG:518
NXP
74LVCH16245ADGG:518
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Transceivers
Bus Transceivers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Bus Hold | Yes |
| Mounting | Surface Mount |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 48 |
| Automotive | No |
| Input Level | LVTTL |
| Output Type | 3-State |
| PCB changed | 48 |
| Logic Family | LVC |
| Output Level | LVTTL |
| Package Width | 6.2(Max) |
| Logic Function | Bus Transceiver |
| Package Height | 1.05(Max) |
| Package Length | 12.6(Max) |
| Supplier Package | TSSOP |
| Tolerant I/Os (V) | 5 |
| Process Technology | CMOS |
| Data Flow Direction | Bi-Directional |
| Number of Channels per Chip | 16 |
| Number of Elements per Chip | 2 |
| Maximum Power Dissipation (mW) | 500 |
| Maximum Quiescent Current (uA) | 80 |
| Typical Quiescent Current (uA) | 0.1 |
| Number of Direction Control Inputs | 1 Low/High |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -40 |
| Number of Input Enables per Element | 0 |
| Absolute Propagation Delay Time (ns) | 16.9 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 1.2 |
| Number of Output Enables per Element | 1 Low |
| Maximum Low Level Output Current (mA) | 24 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -24 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 2.7(Typ)@2.7V|2.4(Typ)@3.3V |
| Description |
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