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Parity Generators and Checkers 74HCT280N,652
NXP
74HCT280N,652
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Standard and Specialty Logic
Parity Generators and Checkers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Mounting | Through Hole |
| ECCN (US) | EAR99 |
| Packaging | Bulk |
| Pin Count | 14 |
| Automotive | No |
| PCB changed | 14 |
| Part Status | Obsolete |
| Logic Family | HCT |
| Package Width | 6.48(Max) |
| Logic Function | Parity Generator/Checker |
| Number of Bits | 9 |
| Package Height | 3.2(Max) |
| Package Length | 19.5(Max) |
| Supplier Package | PDIP |
| Process Technology | CMOS |
| Number of Elements per Chip | 1 |
| Maximum Quiescent Current (uA) | 8 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 68 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Maximum Low Level Output Current (mA) | 4 |
| Maximum High Level Output Current (mA) | -4 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 45@4.5V |
| Description |
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